Master Thesis Open Access
Baptist, Frank Michael
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"@type": "Person",
"affiliation": "KIT/ETP",
"name": "Baptist, Frank Michael"
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"datePublished": "2026-02-13",
"description": "<p>At the Belle II experiment, collisions occur at a rate higher than 200 MHz. Due to bandwidth and storage limitations, storing this amount of data for offline analysis is not feasible. That is why the experiment relies on a two-level trigger system as a preselection before passing the events to subsequent software-based processing and analysis. The first level, known as the Level 1 Trigger (L1 Trigger), is a hardware-based system that makes decisions within a few microseconds. The buffered data from the detector can only be stored for a limited time, which imposes strict latency requirements on the L1 Trigger.</p>\n\n<p>One approach to enhance the L1 Trigger is the development of the GNN-ETM. It utilizes dynamic graph building based on GravNet and can predict a varying number of clusters per event using Object Condensation. The GNN-ETM is implemented on field-programmable gate array (FPGA) hardware, which allows for low-latency inference and is suitable for deployment on the L1 Trigger. The current parasitic implementation of the GNN-ETM in the L1 Trigger has shown promising results in terms of precision and latency. Nevertheless, further improvements, especially in terms of latency, are necessary to develop a potential replacement for the clustering algorithm currently deployed on the ECL L1 Trigger.</p>\n\n<p>In this thesis, I present the optimization of the GNN-ETM for reduced latency, including modifications to the model architecture and training procedure.</p>",
"headline": "Training and Optimization of a Graph Neural Network for Deployment on FPGA Hardware in the Belle II Level 1 Trigger",
"image": "https://publish.etp.kit.edu/static/img/logos/zenodo-gradient-round.svg",
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"alternateName": "eng",
"name": "English"
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"keywords": [
"GNN-ETM",
"GNN",
"Belle II",
"Trigger",
"GravNet",
"Object Condensation"
],
"name": "Training and Optimization of a Graph Neural Network for Deployment on FPGA Hardware in the Belle II Level 1 Trigger",
"url": "https://publish.etp.kit.edu/record/22417"
}